Revision as of 16:27, 5 October 2020 by Charu
- Latest release: 2020.1-2. For more information, see Release Highlights and Download.
- Case study: Ford HIL ECU Testing Stands. For more information, download the SimWB and Ford White Paper.
- SIMulation Workbench supports a full range of I/O cards, including its own high-performance FPGA cards designed for automotive test applications. For more information, download the Engine Sensor Simulation PCIe Card datasheet
Concurrent’s SIMulation Workbench® (SimWB) is a complete modeling environment for developing and executing real-time hardware-in-the-loop and man-in-the-loop simulations. Fully integrated SimWB solutions improve test quality and reduce development and production costs. Concurrent iHawk multiprocessing systems running SimWB are based on COTS components offering the latest, leading-edge processor, chipset, memory and I/O bus technology. With SimWB, individual I/O processes can be targeted to different system cores and I/O buses for parallel execution, thus allowing the simulation loop to run at faster frame rates. SimWB recognizes and utilizes multiple cores by default and there is no limit on the number of cores than can be used by SimWB.
How SimWB Works
SimWB enables users to target multiprocessor RedHawk real-time systems to conduct real-time simulations of their C/C++/Fortran/MATLAB/Simulink models. SIMulation Workbench’s powerful GUI allows users to conveniently configure, start, stop, record and play back simulation runs, build and execute photo-realistic HMI's etc. SimWB provides fast, direct shared memory access to all parameters and signals needed by your simulation. SIMulation Workbench’s in-memory design optimizes performance and data conversion speed. SimWB is built upon a client-server architecture. A real-time host provides the run-time environment for simulation while network-based GUI clients control and display simulation activities. Real-time performance is maximized because the GUI clients run outside of the simulation server.
Real-Time Development and Execution Environment
- Execute MATLAB/Simulink® and custom hand-coded models in real-time using the SimWB MLToolkit
- Multi-rate Simulink® models result in multi-threaded application.
- 32 and 64 bit MATLAB® on Windows® or Linux
- Execute models from SIMPACK®, Dymola®, MapleSim®, AMESIM®, and many other modeling packages in real-time.
- 32 and 64 RedHawk® Linux® real-time operating system
- Sub milli second frame rate
- Data logging and playback
- Debug your models using Concurrent NightStar™ tools
- Photo-realistic HMI's using the integrated SimWB HMI Builder Tool
- Multi-screen simulation displays
Platform-Independent Client GUIs
- Create your HIL software and hardware resources
- Real-Time Database
- User models
- Simulink® models
- Hardware I/O configuration
- Run-time tests and session runs
- Run time HMI
- Run and visualize test execution
- Playback run/stop previously recorded sessions
- Custom I/O panels for operator display and control with extensive widget set
- Thousands of IO points
- I/O tasks dedicated to single device to execute in parallel on different cores
- Fault Insertion & Signal Conditioning (FISC)
- Wide selection of COTS I/O boards
- AFDX / ARINC 664
- ARINC 429
- RVDT / LVDT
- Resolver / Synchro
- IRIG-B Time stamping support
- Master and Slave EtherCAT
- Counter Timer
- Shared and Reflective memory
- Resistor Simulator
- Digital Input / Output
- Analog Input / Output
- RS232 / 422 / 485 Serial
Image: System Architecture
For an in-depth insight into the SimWB architecture, please see SIMulation Workbench Architecture.
SimWB based simulators are pushing the boundaries of rapid prototyping and real-time hardware-in-loop simulators with support for 32 and 64 MATLAB/Simulink on 32 and 64 bit RedHawk real-time Linux operating systems.
Throughput and Overall System Performance
Concurrent iHawk multiprocessing systems running SimWB are based on COTS components offering the latest, leading-edge processor, chipset, memory and I/O bus technology. Solutions that use proprietary hardware are slow in comparison to Concurrent’s latest available COTS-based systems.
With SimWB, individual I/O processes can be targeted to different system cores and I/O buses for parallel execution, thus allowing the simulation loop to run at faster frame rates. Without the ability to run I/O on different cores, I/O processing becomes serialized thus extending execution time of the simulation loop.
SimWB recognizes and utilizes multiple cores by default and there is no limit on the number of cores than can be used by SimWB.
In SimWB, all I/O is performed by processes outside of the Simulink models, thus allowing the models to be independent of the intricacies and specific behavior of the I/O devices. This provides flexibility and makes it easy to remap I/O when necessary. In other HIL solutions, I/O is implemented via Simulink S-functions that are embedded within the Simulink model. They are, for all intents and purposes, part of the model.
There are no practical limits on SimWB configurations. Concurrent iHawk systems can be configured with thousands of hardware I/O points.
Ease of System Upgrade as Requirements Change
SimWB operates with minimal Simulink-specific dependencies. This allows it to support new MATLAB/Simulink releases with little effort. Because the bridge to Simulink is via the Real Time Database, there are only a handful of S-functions to port and/or test against new MATLAB/Simulink releases. Other HIL solutions must port and/or test all of their I/O S-functions for all their supported devices before they support a new MATLAB/Simulink release.
Concurrent’s iHawk platforms running RedHawk Linux and SimWB are open architecture systems. Simulink models that run on Concurrent systems can also be made to run on other systems with minimal effort. Concurrent’s SimWB solutions also support both Linux and Windows client platforms. The use of HIL blocks in the creation of the model environment allows I/O to be run independently of specific hardware platforms.
SimWB provides multi-model support where individual models can be targeted to separate CPU cores for parallel and faster execution.