Difference between revisions of "Release Highlights"
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===Summary by version === | ===Summary by version === | ||
This table provides quick access to what's new in each version. | This table provides quick access to what's new in each version. | ||
+ | |||
+ | ===Release 2024.1-0 (03/05/2024)=== | ||
+ | |||
+ | {|cellpadding="5" width="85%" | ||
+ | |'''<u>Module</u>''' | ||
+ | |width="85%" align="left" | '''<u>Enhancements</u>''' | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|CSharpAPI | ||
+ | |valign="top"| | ||
+ | <ul><li>SimWBCSharpAPI.dll</li> | ||
+ | <ul> | ||
+ | <li>Add support to testCreate() for async models, python models.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top"|I/O Tasks | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>UEI</li> | ||
+ | <ul> | ||
+ | <li>Add support for UEI hardware</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | <ul> | ||
+ | <li>rFpro</li> | ||
+ | <ul> | ||
+ | <li>We used to write 0.0.0.0 as the IPAddress for PhysicsModel in the INI file. | ||
+ | This was to listen on every interface. This sometimes did not work as expected and | ||
+ | bound the connection to only the loopback connection. With new behavior, we use the | ||
+ | existing IPAddress if any.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|MATLAB/Simulink | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>MLToolkit</li> | ||
+ | <ul> | ||
+ | <li><b>Behavior change consideration</b>: The RTDB variable names generated from SimWB | ||
+ | fromRTDB & toRTDB blocks are absolute even with hierarchical setting for top-level | ||
+ | models. In other words, the model name is not appended for the RTDB variables created | ||
+ | from fromRTDB & toRTDB blocks when the said blocks are in the top-level or parent | ||
+ | model.</li> | ||
+ | <li>Add support for shared parameters in reference models hierarchy</li> | ||
+ | <li>Add support for MATLAB R2023b</li> | ||
+ | |||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top"|Python API | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li> PYToolkit </li> | ||
+ | <ul> | ||
+ | <li>Add support for async models to testCreate()</li> | ||
+ | <ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|SimWB Core | ||
+ | |valign="top"| | ||
+ | |||
+ | <ul> | ||
+ | <li> cfgsrv </li> | ||
+ | <ul> | ||
+ | <li>Add support to save the list of hardware records from a CAN DBC inmport. | ||
+ | The records are saved in the Hardware.Records folder of the current project with | ||
+ | the name of the DBC file with the .hrec.dbc extension.</li> | ||
+ | </ul> | ||
+ | |||
+ | <li> scheduler </li> | ||
+ | <ul> | ||
+ | <li>Add internal variables to SimWBStats to keep track of time transpired since | ||
+ | epoch (01-01-1970): ~SimWBStats.clock.sec and ~SimWBStats.clock.nsec.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top"|SimWB WSL | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>Installer</li> | ||
+ | <ul> | ||
+ | <li>Support for SimWB under Windows added.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |} | ||
+ | |||
+ | ===Release 2023.2-0 (08/17/2023)=== | ||
+ | {|cellpadding="5" width="85%" | ||
+ | |'''<u>Module</u>''' | ||
+ | |width="85%" align="left" | '''<u>Enhancements</u>''' | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|I/O Tasks | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>ddc arinc 429</li> | ||
+ | <ul> | ||
+ | <li>Support for SDI in arinc 429 labels.</li> | ||
+ | </ul> | ||
+ | <li>memin/memout</li> | ||
+ | <ul> | ||
+ | <li>Support for DMA on 5565 reflective memory</li> | ||
+ | </ul> | ||
+ | <li>rtdbitemcopy</li> | ||
+ | <ul> | ||
+ | <li>Add support to copy input items to output items. There is a new I/O task <b>rtdbitemcopyout</b> out to implement this. Mapping is done in the original GUI panel.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top" | MATLAB/Simulink | ||
+ | |valign="top" | | ||
+ | <ul> | ||
+ | <li>MLToolkit</li> | ||
+ | <ul> | ||
+ | <li>packNGo has 'minimalHeaders' set to false. All header files found on include paths are now included in the ZIP file.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"| SimWB API | ||
+ | |valign="top" | | ||
+ | <ul> | ||
+ | <li>RTDB access API</li> | ||
+ | <ul> | ||
+ | <li><b>Incompatibility Consideration</b> | ||
+ | <br>The memory layout of RTDB has been modified to improve real-time performance. To do this the rtFlags have been moved out of the RTDBItem structure. If you get an error like the following:<br> | ||
+ | |||
+ | <pre>filename.c:10:64: error: 'RTDBItem' {aka 'struct RTDBItem'} has no member named 'data'; did you mean 'meta'? | ||
+ | if (point->pItem->data.rtFlags |= RTDBFL_OUTOFEURANGE) { | ||
+ | ^~~~ | ||
+ | meta | ||
+ | </pre> | ||
+ | You will need to change the code that accesses the rtFlags. You can use newly added API as below to get the address of rtFlags:<br/> | ||
+ | <pre> | ||
+ | unsigned char *rtFlagsAddress; | ||
+ | rtFlagsAddress ccurRTDB_getItemRTFlagsAddress(pItem); | ||
+ | </pre> | ||
+ | where pItem is the RTDBItem. You can also access the value instead of address as demonstrated below:<br/> | ||
+ | <pre> | ||
+ | unsigned char rtFlags; | ||
+ | rtFlags = ccurRTDB_getItemRTFlagsP(pItem); | ||
+ | </pre> | ||
+ | </ul> | ||
+ | |||
+ | |} | ||
+ | |||
+ | ===Release 2023.1-1 (05/08/2023)=== | ||
+ | {|cellpadding="5" width="85%" | ||
+ | |'''<u>Module</u>''' | ||
+ | |width="85%" align="left" | '''<u>Enhancements</u>''' | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|I/O Tasks | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>iadssrcasyncio</li> | ||
+ | <ul> | ||
+ | <li>Added support for IADS board.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |} | ||
+ | |||
+ | ===Release 2023.1-0 (04/14/2023)=== | ||
+ | |||
+ | {|cellpadding="5" width="85%" | ||
+ | |'''<u>Module</u>''' | ||
+ | |width="85%" align="left" | '''<u>Enhancements</u>''' | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|Control Center | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>RTDB & I/O Mapping </li> | ||
+ | <ul> | ||
+ | <li>Add support for Advantech 1758 DIO mapping panel.</li> | ||
+ | </ul> | ||
+ | |||
+ | <li>Programs</li> | ||
+ | <ul> | ||
+ | <li>Add support for Python synchronous and asynchronous models</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top" | I/O Tasks | ||
+ | |valign="top" | | ||
+ | <ul> | ||
+ | <li>can_sckasyncio</li> | ||
+ | <ul> | ||
+ | <li> Make sure we don't overflow CAN/LINmessage tables</li> | ||
+ | </ul> | ||
+ | |||
+ | <li>can_asyncio</li> | ||
+ | <ul> | ||
+ | <li> Make sure we don't overflow CAN/LIN message tables</li> | ||
+ | </ul> | ||
+ | |||
+ | <li> ixxat640asyncio</li> | ||
+ | <ul> | ||
+ | <li>Add support for CAN custom bit timing parameters </li> | ||
+ | <li>Make sure we don't overflow CAN/LIN message tables</li> | ||
+ | <li>Increase maximum number of LIN messages to 512</li> | ||
+ | </ul> | ||
+ | |||
+ | <li> ixxatasyncio</li> | ||
+ | <ul> | ||
+ | <li>Add support for CAN custom bit timing parameters </li> | ||
+ | <li>Make sure we don't overflow CAN/LIN message tables</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top" | MATLAB/Simulink | ||
+ | |valign="top" | | ||
+ | <ul> | ||
+ | <li>MLToolkit</li> | ||
+ | <ul> | ||
+ | <li>Added support for MATLAB R2023a</li> | ||
+ | <li> Added release-specific UDP block libraries for: | ||
+ | <ul> | ||
+ | <li>R2011a to R2018b</li> | ||
+ | <li>R2019a to R2019b</li> | ||
+ | <li>R2020a to newer</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top" | Python API | ||
+ | |valign="top" | | ||
+ | <ul> | ||
+ | <li>PYToolkit</li> | ||
+ | <ul> | ||
+ | <li> Added API calls in simwbRT modules to support Python models | ||
+ | <ul> | ||
+ | <li>waitAsyncResume()</li> | ||
+ | <li>getSessionUserParm()</li> | ||
+ | <li>modelDataExchangeInit()</li> | ||
+ | <li>modelCopyInputs()</li> | ||
+ | <li>initFailed()</li> | ||
+ | </ul> | ||
+ | </li> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top" | SimWB API | ||
+ | |valign="top" | | ||
+ | <ul> | ||
+ | <li> CScript API</li> | ||
+ | <ul> | ||
+ | </li> Add support for 32-bit C-Scripts</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top" | SimWB Core | ||
+ | |valign="top" | | ||
+ | <ul> | ||
+ | <li>scheduler</li> | ||
+ | <ul> | ||
+ | <li>Add support for 16-core license</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |} | ||
+ | |||
+ | ===Release 2022.2-0 (11/04/2022)=== | ||
+ | {|cellpadding="5" width="85%" | ||
+ | |'''<u>Module</u>''' | ||
+ | |width="85%" align="left" | '''<u>Enhancements</u>''' | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|I/O Tasks | ||
+ | |valign="top"| | ||
+ | <ul><li>rfpro</li> | ||
+ | <ul> | ||
+ | <li>Automatic mapping for VI-grade DriveSim.</li> | ||
+ | </ul> | ||
+ | <li>rfpro_ts_in</li> | ||
+ | <ul> | ||
+ | <li>Added support for rFproTerrainServer 2022a. Note TerrainServer has been renamed as rFproTerrainServer.</li> | ||
+ | </ul> | ||
+ | <li>rfpro_ts_in</li> | ||
+ | <ul> | ||
+ | <li>Initial support for ROS messages.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |-bgcolor="#f0f8ff" | ||
+ | |valign="top"|SimWB Core | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>RTDB</li> | ||
+ | <ul> | ||
+ | <li>Support for arrays of structures and structures in RTDB to support structure I/O mapping.</li> | ||
+ | <li>Items defined as arrays of structures. I.e. point[10].xx[12] are expanded.</li> | ||
+ | </ul> | ||
+ | <li>cfgsrv</li> | ||
+ | <ul> | ||
+ | <li>Add global refresh lock so that when another RTDB is loaded by sched, all the refresh items are cleared.</li> | ||
+ | <li>Support for ROS message board.</li> | ||
+ | </ul> | ||
+ | <li>scheduler</li> | ||
+ | <ul> | ||
+ | <li>Add global refresh lock so that when another RTDB is loaded by sched, all the refresh items are cleared. sched will notify cfgsrv via a SIGUSR1.</li> | ||
+ | <li>Expand RTDB items that are defined as arrays of structures.</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |||
+ | |} | ||
+ | |||
+ | ===Release 2022.1-1 (07/18/2022)=== | ||
+ | {|cellpadding="5" width="85%" | ||
+ | |'''<u>Module</u>''' | ||
+ | |width="85%" align="left" | '''<u>Enhancements</u>''' | ||
+ | |||
+ | |-bgcolor="#e0f0ff" | ||
+ | |valign="top"|I/O Tasks | ||
+ | |valign="top"| | ||
+ | <ul> | ||
+ | <li>CP-FPGA-ArV</li> | ||
+ | <ul> | ||
+ | <li>Added support for NPhase Wavegen and WavegenRx</li> | ||
+ | <li>Added Timeout feature in PWM Input IP</li> | ||
+ | </ul> | ||
+ | </ul> | ||
+ | |} | ||
===Release 2022.1-0 (05/13/2022)=== | ===Release 2022.1-0 (05/13/2022)=== |
Latest revision as of 02:47, 6 March 2024
Contents
- 1 Summary by version
- 2 Release 2024.1-0 (03/05/2024)
- 3 Release 2023.2-0 (08/17/2023)
- 4 Release 2023.1-1 (05/08/2023)
- 5 Release 2023.1-0 (04/14/2023)
- 6 Release 2022.2-0 (11/04/2022)
- 7 Release 2022.1-1 (07/18/2022)
- 8 Release 2022.1-0 (05/13/2022)
- 9 Release 2021.2-1 (12/31/2021)
- 10 Release 2021.1-0 (06/17/2021)
- 11 Release 2020.2-0 (11/25/2020)
- 12 Release 2020.1-2 (06/26/2020)
- 13 Release 2020.1-1 (06/18/2020)
- 14 Release 2020.1-0 (06/10/2020)
- 15 Release 2019.3-3(11/20/2019)
- 16 Release 2019.3-2 (11/12/2019)
- 17 Release 2019.2-0 (05/29/2019)
- 18 Release 2019.1-0 (03/29/2019)
- 19 Release 2018.3-0 (11/30/2018)
- 20 Release 2018.2-0 (08/29/2018)
- 21 Release 2018.1-0 (03/23/2018)
- 22 Release 2017.3-0 (08/17/2017)
- 23 Release 2017.1-0 (02/21/2017)
- 24 Release 7.9-0 (12/16/2016)
- 25 Release 7.7-0 (06/28/2016)
- 26 Release 7.6-0 (05/13/2016)
- 27 Release 7.5-1 (04/11/2016)
- 28 Release 7.5-0 (04/06/2016)
- 29 Release 7.4-0 (01/08/2016)
- 30 Release 7.3-0 (10/05/2015)
- 31 Release 7.2-0 (06/25/2015)
- 32 Release 7.1-0 (06/03/2015)
- 33 Release 7.0-0 (05/05/2015)
- 34 Release 6.10-1 (01/22/2015)
- 35 Release 6.10-0 (12/31/2014)
- 36 Release 6.9-1 (09/05/2014)
- 37 Release 6.9-0 (08/25/2014)
- 38 Release 6.7-4 (06/23/2014)
- 39 Release 6.7-3 (06/17/2014)
- 40 Release 6.7-2 (05/02/2014)
- 41 Release 6.7-1 (04/08/2014)
- 42 Release 6.7-0 (03/28/2014)
- 43 Release 6.5-1 (02/21/2014)
- 44 Release 6.5-0 (02/19/2014)
- 45 Release 6.4-0 (01/22/2014)
- 46 Release 6.3-0 (12/19/2013)
- 47 Release 6.2-2 (12/10/2013)
- 48 Release 6.1-0 (11/19/2013)
- 49 Release 6.0-1 (09/30/2013)
- 50 Release 6.0-0 (09/26/2013)
- 51 Release 5.5-5 (05/13/2013)
- 52 Release 5.5-0 (02/18/2013)
- 53 Release 5.1-0 (10/16/2012)
- 54 Release 5.0-3 (07/31/2012)
- 55 Release 5.0-2 (05/24/2012)
- 56 Release 5.0-1 (05/11/2012)
Summary by version
This table provides quick access to what's new in each version.
Release 2024.1-0 (03/05/2024)
Module | Enhancements |
CSharpAPI |
|
I/O Tasks |
|
MATLAB/Simulink |
|
Python API |
|
SimWB Core |
|
SimWB WSL |
|
Release 2023.2-0 (08/17/2023)
Module | Enhancements |
I/O Tasks |
|
MATLAB/Simulink |
|
SimWB API |
|
Release 2023.1-1 (05/08/2023)
Module | Enhancements |
I/O Tasks |
|
Release 2023.1-0 (04/14/2023)
Module | Enhancements |
Control Center |
|
I/O Tasks |
|
MATLAB/Simulink |
|
Python API |
|
SimWB API |
|
SimWB Core |
|
Release 2022.2-0 (11/04/2022)
Module | Enhancements |
I/O Tasks |
|
SimWB Core |
|
Release 2022.1-1 (07/18/2022)
Module | Enhancements |
I/O Tasks |
|
Release 2022.1-0 (05/13/2022)
Module | Enhancements |
CSharpAPI |
|
FMU |
|
I/O Tasks |
|
MATLAB/Simulink |
|
Python API |
|
SimWB Core |
|
Release 2021.2-1 (12/31/2021)
Module | Enhancements |
MATLAB/Simulink |
|
SimWB Core |
|
Release 2021.1-0 (06/17/2021)
Module | Enhancements |
CSharpAPI |
|
Data logger |
|
I/O Tasks |
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
MATLAB/Simulink |
|
Python API |
|
SimWB Core |
|
| |
| |
Third Party Tools |
|
Release 2020.2-0 (11/25/2020)
Module | Enhancements |
CSharpAPI | |
SimWBCSharpAPI.dll |
|
User Models |
|
FMU/FMIL |
|
I/O Tasks |
|
Java Installer / Installer |
|
MATLAB/Simulink/MLToolkit |
|
Python API/ASAM Support |
|
Python API/PYToolkit |
|
SimWB API / Client API |
|
SimWB Core/cfgsrv |
|
SimWB Core/scheduler |
Allow multiple CPUs to be specified in /usr/local/ccursim/etc/schedtasks.txt. The affinity of the task is specified as a mask of given CPUs. This is to allow I/O tasks (CAN) to run on multiple cores specified by the user. |
Release 2020.1-2 (06/26/2020)
Module | Enhancements |
I/O Tasks | |
ddc 1553 |
|
Release 2020.1-1 (06/18/2020)
Module | Enhancements |
I/O Tasks |
|
Release 2020.1-0 (06/10/2020)
Module | Enhancements |
FMU |
|
I/O Tasks |
|
Java Installer |
|
MATLAB/Simulink |
|
Python API | PYToolkit
|
SimWB Core |
|
Third Party Tools | GL Studio
|
Ubuntu Specific | arm64
|
Utility tool | simwb-ar
|
Release 2019.3-3(11/20/2019)
Module | Enhancements |
FPGA |
|
MATLAB/Simulink |
|
Release 2019.3-2 (11/12/2019)
Module | Enhancements |
FMU |
|
I/O Tasks |
|
MATLAB / Simulink |
|
Python API |
|
SimWB Core |
|
Utility tool |
|
Release 2019.2-0 (05/29/2019)
Module | Enhancements |
Data logger | |
dl2mat |
|
I/O Tasks |
|
Python API |
|
SimWB API |
|
SimWB Core |
|
Release 2019.1-0 (03/29/2019)
Module | Enhancements |
CSharpAPI | |
SimWBCSharpAPI.dll |
|
FPGA |
|
MATLAB/Simulink |
|
Python API |
|
Release 2018.3-0 (11/30/2018)
Module | Enhancements
apt install libwebkitgtk-3.0-0 |
Release 2018.2-0 (08/29/2018)
Module | Enhancements |
Control Center |
|
I/O Tasks |
|
MATLAB/Simulink |
|
SimWB API |
|
SimWB Core |
|
Ubuntu Specific |
|
Release 2018.1-0 (03/23/2018)
Module | Enhancements |
FMU |
|
I/O Tasks |
|
MATLAB/Simulink |
|
Python API |
|
SimWB API |
|
SimWB Core |
|
Third Party Tools |
|
Release 2017.3-0 (08/17/2017)
Module | Enhancements |
Data logger |
|
I/O Tasks |
|
MATLAB/Simulink |
|
SimWB Core |
|
FPGA |
|
Python API |
|
SimWB API |
|
Utility Tool |
|
Release 2017.1-0 (02/21/2017)
Module | Enhancements |
CSharpAPI | |
SimWBCSharpAPI.dll |
|
I/O Tasks |
|
MATLAB/Simulink |
|
SimWB Core |
|
Release 7.9-0 (12/16/2016)
Module | Enhancements |
SimWB Core |
|
MATLAB/Simulink |
|
I/O Tasks |
|
Third Party Tools |
|
FPGA |
|
CSharpAPI |
|
Release 7.7-0 (06/28/2016)
Module | Enhancements |
FMU | |
AutoBuildScripts |
|
I/O Tasks |
|
SimWB Core |
|
Release 7.6-0 (05/13/2016)
Module | Enhancements |
CSharpAPI | |
SimWBCSharpAPI.dll |
|
FMU |
|
I/O Tasks |
|
MATLAB/Simulink |
|
Python API |
|
SimWB Core |
|
java/HMI |
|
Release 7.5-1 (04/11/2016)
Creating new sessions failed in tests involving SIMPACK models. Fixed. |
Column Major Flag was set incorrectly for Shared Parameters. Fixed |
Release 7.5-0 (04/06/2016)
Module | Enhancements |
CSharpAPI / SimWBCSharpAPI.dll |
|
I/O Tasks |
|
SimWB Core |
|
Java Installer / Installer |
|
MATLAB/Simulink |
|
Python API |
|
Release 7.4-0 (01/08/2016)
Module | Enhancements |
Control Center |
|
FMU |
|
I/O Tasks |
|
SimWB Core |
|
MATLAB/Simulink |
|
Release 7.3-0 (10/05/2015)
Module | Enhancements |
I/O Tasks |
|
MATLAB/Simulink |
|
PythonAPI |
|
SimWB API |
|
Release 7.2-0 (06/25/2015)
Module | Enhancements |
I/O Tasks |
|
Release 7.1-0 (06/03/2015)
Module | Enhancements |
SimWB API |
|
SimWB Core |
|
Test Scripting |
|
Release 7.0-0 (05/05/2015)
Module | Enhancements |
I/O tasks |
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MATLAB/Simulink |
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SimWB Core |
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FMU |
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Release 6.10-1 (01/22/2015)
Module | Enhancements |
I/O tasks |
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MATLAB/Simulink |
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SimWB Core |
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Release 6.10-0 (12/31/2014)
Module | Enhancements |
Data Logger |
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I/O tasks |
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MATLAB/Simulink |
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Python API |
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SimWB Core |
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Release 6.9-1 (09/05/2014)
Module | Enhancements |
Control Center |
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I/O tasks |
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Release 6.9-0 (08/25/2014)
Module | Enhancements |
Control Center |
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I/O tasks |
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MATLAB/Simulink |
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Python ASAM support |
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SimWB Core |
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Release 6.7-4 (06/23/2014)
Module | Enhancements |
I/O tasks - dd42992 |
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Release 6.7-3 (06/17/2014)
Module | Enhancements |
Control Center |
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I/O tasks - Moxa fastcomm |
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Python ASAM support |
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SimWB Core |
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Release 6.7-2 (05/02/2014)
Module | Enhancements |
MATLAB/Simulink |
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SimWB Core |
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Release 6.7-1 (04/08/2014)
Module | Enhancements |
I/O Tasks |
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Release 6.7-0 (03/28/2014)
Module | Enhancements |
FMU |
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I/O Tasks |
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Python API |
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SimWB Core |
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Release 6.5-1 (02/21/2014)
Bug fixes to AIT AFDX I/O tasks. |
Fix for missing 64 bit ARINC429 I/O tasks. |
Release 6.5-0 (02/19/2014)
Module | Enhancements |
Data Logger |
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I/O Tasks |
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MATLAB/Simulink |
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Python API |
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Utility tool |
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Release 6.4-0 (01/22/2014)
Module | Enhancements |
Control Center |
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I/O Tasks |
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SimWB Core |
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Release 6.3-0 (12/19/2013)
Bug fixes to SimWB Control Center and I/O Tasks.
Release 6.2-2 (12/10/2013)
Module | Enhancements |
Control Center |
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I/O Tasks |
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Python API |
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SimWB Core |
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Release 6.1-0 (11/19/2013)
Module | Enhancements |
Control Center |
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I/O Tasks |
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Python API |
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SimWB API |
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SimWB Core |
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Release 6.0-1 (09/30/2013)
Bug fixes to MLToolkit
Release 6.0-0 (09/26/2013)
Module | Enhancements |
Control Center |
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Data Logger |
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I/O Tasks |
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MATLAB/Simulink |
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Python API |
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SimWB API |
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SimWB Core |
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Utility Tool |
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Release 5.5-5 (05/13/2013)
Module | Enhancements |
Control Center |
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I/O Tasks |
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MATLAB/Simulink |
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SimWB API |
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SimWB Core |
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Release 5.5-0 (02/18/2013)
Module | Enhancements |
Control Center |
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Data Logger | dl2mat - Added support for the extraction of RTDB strings as arrays of unsigned byte values.. |
Release 5.1-0 (10/16/2012)
Module | Enhancements |
Control Center |
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Data Logger | logsrv - Ability to run the logger in unbuffered mode when "Direct I/O" is unselected for the session. This is done via the /etc/ccursim.conf keyword "unbufferedio=N", where N is any non-zero value (the default is zero). |
I/O Tasks | logiwheel - New support for Logitech G27 steering wheel. |
SimWB Core | Add maximum initialization time in seconds as an additional parameter when creating the session. The default used by the scheduler is 45 seconds when specified as 0. The parameter is defined as maxinitime=xx in the test/session setup file. |
Release 5.0-3 (07/31/2012)
Module | Enhancements |
Control Center |
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Data Logger | dl2mat- New smart naming heuristics available via -s option (see detailed command useage via -h option for details). Saved -M output can later be used as a tag file. |
I/O Tasks | pas2080 - Added a BIAS= option to pulse counting latch value reporting, wherein the latch value will be reported relative to the BIAS value. You may now have multiple COS definitions for the same channel (e.g. count pulses on the same channel but with two different latch windows). |
MATLAB/Simulink | New SimWB Custom Blocks Library. New DBC_CAN Block - a template block which can be customized based on an imported DBC file and user selected options.
SimWB preferences GUI to set-up RTDB creation and code generation options.
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SimWB API | Move all internal initialization code that used to be in the main function in CScripttmpl.c to the library libccur_CScript.a so that the user can write their own main script.
Add API calls ccurSched_getSessionOverruns and ccurSched_getMaxOverruns to query the number of overruns occurend in the running session and the maximum # of overruns allowed. |
Release 5.0-2 (05/24/2012)
Module | Enhancements |
I/O Tasks | afdxasyncio - Add internal CAN hardware variables to monitor CAN message output schedule rate etc.
canasyncio - Add support to run under 64 bit. Add internal CAN hardware variables to monitor CAN message output schedule rate etc. Change schedule TX of CAN messages from board implementation/API to software timing as in afdxasyncio and arinc429asyncio. All corresponding API calls have been added to allow for control of TX rates/modes, etc.
New session start/stop/pause buttons in the global toolbar.
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MATLAB/Simulink | Ignore FromWs block in Signal Builder Blocks during RTDB creation and check compliance.
Convert sample time of Inf to -1 for const blocks since SimWB does not under stand Inf.
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SimWB API | Change schedule TX of CAN messages from board implementation/API to software timing as in afdxasyncio and arinc429asyncio. All corresponding API calls have been added to allow for control of TX rates/modes, etc. |
SimWB Core | Add service call gethardwarevars to get the list of internal variables from the selected RTDB. The hardwarerecord.db file is read and internal variable names are generated from it. |
Release 5.0-1 (05/11/2012)
Module | Enhancements |
Control Center | New navigation with global toolbar, global command tabs, and local toolbars.
New session start/stop/pause buttons in the global toolbar.
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Data logger | Improved tag creation heuristics always result in a tag.
-X option added to specify extracted items on the command line.
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I/O Tasks | PAS2080 initialization of pulse window latch now deferred one cycle for more accuracy.
Toothed wheel bias handling improved to avoid possible hang. |
MATLAB/Simulink | Enhanced support for nested model referenced models.
Support added for non-virtual buses in MATLAB R2010a and later.
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SimWB Core | Support added for default value of array items.
New generic multirate scheduler added to SimWB. |